Quantum computing is a devilishly difficult technology that faces numerous technical challenges. Miniaturization and qubit quality are two significant difficulties among these challenges.
IBM has accepted the superconducting qubit road map, which calls for a 1,121-qubit processor by 2023, implying that 1,000 qubits can be achieved with today’s qubit form factor. However, existing technologies will necessitate the use of chiplets on multichip modules or very huge chips (50 millimeters on a side or larger) at the scale of small wafers. While this method will work, the goal is to find a more efficient path to scalability.
Researchers at MIT have now been able to lower the size of qubits while also reducing the amount of interference that happens between adjacent qubits. The number of superconducting qubits that can be added to a device has been boosted by a factor of 100 by MIT researchers.
“We’re dealing with both qubit downsizing and quality,” said William Oliver, director of MIT’s Center for Quantum Engineering. “Unlike conventional transistor scaling, where only the quantity matters, large numbers aren’t enough for qubits; they need to be high-performance as well.” In quantum computing, sacrificing performance for qubit numbers is not a good deal. They have to work together.”
The utilisation of two-dimensional materials, particularly hexagonal boron nitride, is the key to this significant increase in qubit density and reduction in interference (hBN). A few atomic monolayers of hBN can be stacked to produce the insulator in the capacitors of a superconducting qubit, according to MIT researchers.
The capacitors in these superconducting circuits are sandwich capacitors, just like ordinary capacitors, with an insulator material sandwiched between two metal plates. The main distinction is that superconducting circuits can only work at extremely low temperatures—less than 0.02 degrees above absolute zero (-273.15 °C) for these capacitors.
In this setting, accessible insulating materials, such as PE-CVD silicon oxide or silicon nitride, contain a number of flaws that are too lossy for quantum computing applications. To compensate for these material flaws, most superconducting circuits include coplanar capacitors. Instead of being stacked on top of one another, the plates in these capacitors are arranged laterally.
As a result, the capacitor dielectric is made up of the inherent silicon substrate beneath the plates and, to a lesser extent, the vacuum above the plates. The vast size dilutes the electric field at the plate interfaces, resulting in a low-loss capacitor. Intrinsic silicon is chemically pure and hence has few imperfections, and the big size dilutes the electric field at the plate interfaces, resulting in a low-loss capacitor.
In order to avoid the enormous lateral configuration, the MIT researchers set out to find an insulator with low imperfections that could be used with superconducting capacitor plates.
“We chose to explore hBN because its purity and chemical inertness make it the most extensively utilised insulator in 2D material research,” said lead author Joel Wang, a research scientist in the MIT Research Laboratory for Electronics’ Engineering Quantum Systems group.
The MIT researchers employed niobium diselenide, a 2D superconducting material, on both sides of the hub. Working with niobium diselenide, which oxidizes in seconds when exposed to air, was one of the most difficult elements of making the capacitors, according to Wang. As a result, the capacitor must be assembled in a glove box filled with argon gas.
While this may appear to make scaling up the production of these capacitors more difficult, Wang does not see this as a limiting factor.
“What determines the quality factor of the capacitor are the two interfaces between the two materials,” said Wang. “Once the sandwich is made, the two interfaces are “sealed” and we don’t see any noticeable degradation over time when exposed to the atmosphere.”
Because roughly 90% of the electric field is confined within the sandwich structure, oxidation of the niobium diselenide’s outer surface no longer plays a significant role, there is no deterioration. This reduces cross-talk between neighboring qubits and makes the capacitor footprint significantly lower.
“Wafer-scale growth of hBN and 2D superconductors like [niobium diselenide] and how to execute wafer-scale stacking of these films would be the primary hurdle for scaling up the fabrication,” Wang noted.
Wang believes that this research has shown 2D hBN to be a good insulator candidate for superconducting qubits. He says that the groundwork the MIT team has done will serve as a road map for using other hybrid 2D materials to build superconducting circuits.